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authorDaniel Jedrychowski <[email protected]>2016-12-12 09:18:28 +1100
committerGreg Kroah-Hartman <[email protected]>2017-01-11 08:35:17 +0100
commit2bed8a8e70729f996af92042d3ad0f11870acc1f (patch)
treebef2d20e174c126ea18ad33cb4f7c0a9790b08a2 /scripts/gdb/linux/symbols.py
parentc130b666a9a711f985a0a44b58699ebe14bb7245 (diff)
Clearing FIFOs in RS485 emulation mode causes subsequent transmits to break
When in RS485 emulation mode, __do_stop_tx_rs485() calls serial8250_clear_fifos(). This not only clears the FIFOs, but also sets all bits in their control register (UART_FCR) to 0. One of the effects of this is the disabling of the FIFOs, which turns them into single-byte holding registers. The rest of the driver doesn't know this, which results in the lions share of characters passed into a write call to be dropped. (I can supply logic analyzer screenshots if necessary) This fix replaces the serial8250_clear_fifos() call to serial8250_clear_and_reinit_fifos() - this prevents the "dropped characters" issue from manifesting again while retaining the requirement of clearing the RX FIFO after transmission if the SER_RS485_RX_DURING_TX flag is disabled. Signed-off-by: Daniel Jedrychowski <[email protected]> Cc: stable <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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