spi: meson-spicc: add a linear clock divider support

The SPICC controller in Meson-AXG SoC is capable of using
a linear clock divider to reach a much fine tuned range of clocks,
while the old controller only use a power of two clock divider,
result at a more coarse clock range.

Also convert the clock registration into Common Clock Framework.

Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Yixun Lan <[email protected]>
Signed-off-by: Sunny Luo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>

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