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authorLuiz Angelo Daros de Luca <[email protected]>2021-11-26 17:13:55 -0300
committerDavid S. Miller <[email protected]>2021-11-29 12:14:31 +0000
commit1e89ad864d035001835ccf02acea7b1d3dc41819 (patch)
tree5b72936da3820d4f5dba127c823d971dab3d348e /scripts/gdb/linux/proc.py
parentdacb5d8875cc6cd3a553363b4d6f06760fcbe70c (diff)
net: dsa: realtek-smi: fix indirect reg access for ports>3
This switch family can have up to 8 UTP ports {0..7}. However, INDIRECT_ACCESS_ADDRESS_PHYNUM_MASK was using 2 bits instead of 3, dropping the most significant bit during indirect register reads and writes. Reading or writing ports 4, 5, 6, and 7 registers was actually manipulating, respectively, ports 0, 1, 2, and 3 registers. This is not sufficient but necessary to support any variant with more than 4 UTP ports, like RTL8367S. rtl8365mb_phy_{read,write} will now returns -EINVAL if phy is greater than 7. Fixes: 4af2950c50c8 ("net: dsa: realtek-smi: add rtl8365mb subdriver for RTL8365MB-VC") Signed-off-by: Luiz Angelo Daros de Luca <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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