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| author | Dharma Balasubiramani <[email protected]> | 2023-09-05 15:38:35 +0530 |
|---|---|---|
| committer | William Breathitt Gray <[email protected]> | 2023-09-05 12:25:14 -0400 |
| commit | df8fdd01c98b99d04915c04f3a5ce73f55456b7c (patch) | |
| tree | 84e559ff889c6a1c008394f86649dcd10f4ee2d5 /scripts/gdb/linux/page_owner.py | |
| parent | 3170256d7bc1ef81587caf4b83573eb1f5bb4fb6 (diff) | |
counter: microchip-tcb-capture: Fix the use of internal GCLK logic
As per the datasheet, the clock selection Bits 2:0 – TCCLKS[2:0] should
be set to 0 while using the internal GCLK (TIMER_CLOCK1).
Fixes: 106b104137fd ("counter: Add microchip TCB capture counter")
Signed-off-by: Dharma Balasubiramani <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: William Breathitt Gray <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/page_owner.py')
0 files changed, 0 insertions, 0 deletions