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| author | Thomas Gleixner <tglx@linutronix.de> | 2023-04-21 17:30:57 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2023-04-21 17:30:57 +0200 |
| commit | f37202aa6e5d6d39a48f744d962fd2bf3a8a452b (patch) | |
| tree | aa96acbf6dfb532fbf9d915d8c022ad680210f9a /scripts/gdb/linux/modules.py | |
| parent | 803235982b8c086184d04798d9079d236f352f88 (diff) | |
| parent | 2ff1b0839ddd514be4752c64c1c6facf91ff3a56 (diff) | |
Merge tag 'irqchip-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip changes from Marc Zyngier:
- Large RISC-V IPI rework to make way for a new interrupt
architecture
- More Loongarch fixes from Lianmin Lv, fixing issues in the so
called "dual-bridge" systems.
- Workaround for the nvidia T241 chip that gets confused in
3 and 4 socket configurations, leading to the GIC
malfunctionning in some contexts
- Drop support for non-firmware driven GIC configurarations
now that the old ARM11MP Cavium board is gone
- Workaround for the Rockchip 3588 chip that doesn't
correctly deal with the shareability attributes.
- Replace uses of of_find_property() with the more appropriate
of_property_read_bool()
- Make bcm-6345-l1 request its MMIO region
- Add suspend support to the SiFive PLIC
- Drop support for stih415, stih416 and stid127 platforms
Link: https://lore.kernel.org/lkml/20230421132104.3021536-1-maz@kernel.org
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