diff options
| author | Judith Mendez <[email protected]> | 2024-03-20 17:38:32 -0500 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2024-04-02 12:21:39 +0200 |
| commit | d465234493bb6ad1b9c10a0c9ef9881b8d85081a (patch) | |
| tree | aecd4ec80374a6d3bb3691e1ca59925650755a14 /scripts/gdb/linux/modules.py | |
| parent | 6231d99dd4119312ad41abf9383e18fec66cbe4b (diff) | |
mmc: sdhci_am654: Write ITAPDLY for DDR52 timing
For DDR52 timing, DLL is enabled but tuning is not carried
out, therefore the ITAPDLY value in PHY CTRL 4 register is
not correct. Fix this by writing ITAPDLY after enabling DLL.
Fixes: a161c45f2979 ("mmc: sdhci_am654: Enable DLL only for some speed modes")
Signed-off-by: Judith Mendez <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions