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authorManivannan Sadhasivam <[email protected]>2024-03-21 16:46:26 +0530
committerBjorn Andersson <[email protected]>2024-04-21 12:31:41 -0500
commitcc2ad77882fb9ff54d9f626df73057558dcd8322 (patch)
tree637b0017299c203eb27d53def011b95cee92a21a /scripts/gdb/linux/modules.py
parent4261fd53582df00dc7d3a384a552c35d76ab0ace (diff)
arm64: dts: qcom: sm8550: Add PCIe bridge node
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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