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authorEduardo Valentin <[email protected]>2015-08-11 10:21:20 -0700
committerGreg Kroah-Hartman <[email protected]>2015-08-14 17:23:25 -0700
commit9e7b399d6528eac33a6fbfceb2b92af209c3454d (patch)
tree0d6a624fd74f7312c44ded789a8523c8e0235e05 /scripts/gdb/linux/modules.py
parenteafb9eea7622d765effb1a06f8cf5eb31fa018f6 (diff)
serial: imx: remove unbalanced clk_prepare
The current code attempts to prepare clk_per and clk_ipg before using the device. However, the result is an extra prepare call on each clock. Here is the output of uart clocks (only uart enabled and used as console): $ grep uart /sys/kernel/debug/clk/clk_summary uart_serial 1 2 80000000 0 0 uart 1 2 66000000 0 0 This patch balances the calls of prepares. The result is: $ grep uart /sys/kernel/debug/clk/clk_summary uart_serial 1 1 80000000 0 0 uart 1 1 66000000 0 0 Cc: Fabio Estevam <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Jiri Slaby <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Eduardo Valentin <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
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