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authorConor Dooley <[email protected]>2022-04-13 08:58:28 +0100
committerStephen Boyd <[email protected]>2022-04-22 18:39:59 -0700
commit8f9fb2abe22ece8cac47a8cef3e716441d4ba169 (patch)
tree6b7ea78186824717aa799e4f415a602e2578b089 /scripts/gdb/linux/modules.py
parentd968fda3de91ec2f250ba27149cb1b5e9516415f (diff)
clk: microchip: mpfs: fix parents for FIC clocks
The fabric interconnects are on the AXI bus not AHB. Update their parent clocks to fix this. Fixes: 635e5e73370e ("clk: microchip: Add driver for Microchip PolarFire SoC") Reviewed-by: Daire McNamara <[email protected]> Signed-off-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Palmer Dabbelt <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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