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| author | Hai Li <[email protected]> | 2015-05-15 13:04:04 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2015-06-11 13:11:04 -0400 |
| commit | 825637b9c06cede2a742421b0ea6f24428099af3 (patch) | |
| tree | b0195dbd6f733b19d749e31d1a0b8aba1707a1fa /scripts/gdb/linux/modules.py | |
| parent | bdc80de2a6dbaa0d08c393b4ba8912a0ad4b047f (diff) | |
drm/msm/dsi: Add DSI PLL clock driver support
DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.
This change handles DSI 28nm PLL only.
Signed-off-by: Hai Li <[email protected]>
Signed-off-by: Archit Taneja <[email protected]>
Signed-off-by: Stephane Viau <[email protected]>
Signed-off-by: Wentao Xu <[email protected]>
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions