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authorMarek Vasut <[email protected]>2023-05-14 08:46:25 -0300
committerNeil Armstrong <[email protected]>2023-05-22 15:37:18 +0200
commit74629c49e66cc6d36c46ac4e3f059780873ceedf (patch)
treeeabe74294113b3405b262f8f3baa87958cdca60d /scripts/gdb/linux/modules.py
parentec7743c9c48a14aa884d27f2feee1da30810ce0a (diff)
drm: bridge: samsung-dsim: Implement support for clock/data polarity swap
Implement support for DSI clock and data lane DN/DP polarity swap by means of decoding 'lane-polarities' DT property. The controller does support DN/DP swap of clock lane and all data lanes, the controller does not support polarity swap of individual data lane bundles, add a check which verifies all data lanes have the same polarity. This has been validated on an imx8mm board that actually has the MIPI DSI clock lanes inverted. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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