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authorManivannan Sadhasivam <[email protected]>2024-03-21 16:46:24 +0530
committerBjorn Andersson <[email protected]>2024-04-21 12:31:41 -0500
commit3b743d532eac3cd1ab8fb21e8bf0390715237d8b (patch)
tree2b2fa66f04315e9c16e979735b0dd8e07adef7db /scripts/gdb/linux/modules.py
parent8e0a95add7e3f3838d5b494ce645c48759ba4168 (diff)
arm64: dts: qcom: sm8350: Add PCIe bridge node
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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