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authorZhen Lei <[email protected]>2020-10-12 14:12:16 +0800
committerWei Xu <[email protected]>2020-11-24 19:43:18 +0800
commit30ea026e33c6dda48849d9fe0d15c1d280a92d53 (patch)
tree62208f28421b1dd717f23927b878761493ee1d84 /scripts/gdb/linux/modules.py
parent3650b228f83adda7e5ee532e2b90429c03f7b9ec (diff)
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
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