diff options
| author | Sam Protsenko <[email protected]> | 2023-02-22 22:21:29 -0600 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2023-03-06 16:53:08 +0100 |
| commit | 284f6dcb50ae7f25167617c89aa2d3f93323ee67 (patch) | |
| tree | c641e3b6e5d6013e9d703aeb8f0bc59d5a3d1255 /scripts/gdb/linux/modules.py | |
| parent | 521568cff7065069bfb02b3a9945bac637d2e324 (diff) | |
dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
Add main gate clocks for controlling AUD and HSI CMUs:
- gout_aud_cmu_aud_pclk
- gout_hsi_cmu_hsi_pclk
While at it, add missing PPMU (Performance Profiling Monitor Unit)
clocks for CMU_HSI.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Sam Protsenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions