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authorAnshuman Khandual <[email protected]>2020-05-19 15:10:44 +0530
committerWill Deacon <[email protected]>2020-05-21 15:47:11 +0100
commit0ae43a99fe91399d9e5b2d0756e16e97b21cc187 (patch)
tree4309295ebf082227905b53f0ec1dc48d72ad9302 /scripts/gdb/linux/modules.py
parent152accf8476f0447de57d9ffaf0c5ab578ed3d40 (diff)
arm64/cpufeature: Add remaining feature bits in ID_PFR0 register
Enable DIT and CSV2 feature bits in ID_PFR0 register as per ARM DDI 0487F.a specification. Except RAS and AMU, all other feature bits are now enabled. Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: [email protected] Cc: [email protected] Suggested-by: Mark Rutland <[email protected]> Signed-off-by: Anshuman Khandual <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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