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| author | Joel Stanley <[email protected]> | 2020-09-21 18:46:44 +0930 |
|---|---|---|
| committer | Joel Stanley <[email protected]> | 2020-09-25 10:14:12 +0930 |
| commit | fe100b382c1c052b63c14091fd8bb3fe932453ae (patch) | |
| tree | abac7568839e6322448b4ae8b053e003fafc0623 /scripts/gdb/linux/lists.py | |
| parent | e0218dca5787c851b403fcbc33cdfec795446fca (diff) | |
ARM: dts: aspeed: Add silicon id node
This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.
Reviewed-by: Andrew Jeffery <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/lists.py')
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