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authorKrzysztof Kozlowski <[email protected]>2023-09-24 20:31:02 +0200
committerBjorn Andersson <[email protected]>2023-12-02 16:48:46 -0800
commitf64f653df2ef713359178c731bc8f89ff54014b1 (patch)
tree23a562bbccaf1cc95ed2043bfc6e5d82916063fa /scripts/gdb/linux/lists.py
parent94da379dba88c4cdd562bad21c9ba5656e5ed5df (diff)
ARM: dts: qcom: sdx65: add missing GCC clocks
The SDX65 GCC clock controller expects two required clocks: pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk. The first one is provided by existing phy node, but second is not yet implemented. qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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