diff options
| author | Dmitry Osipenko <[email protected]> | 2020-11-04 19:49:07 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2020-11-26 18:50:35 +0100 |
| commit | d5ecac0afa30811901eb401067f196e688aeb73e (patch) | |
| tree | 50bc1241b1d4383866753cd4cc3b0ebc515928a9 /scripts/gdb/linux/lists.py | |
| parent | 162641a6e200e935cd39b26737f3ec0b5ea856fb (diff) | |
memory: tegra: Add missing latency allowness entry for Page Table Cache
Add missing PTC memory client latency allowness entry to the Tegra MC
drivers.
This prevents erroneous clearing of MC_INTSTATUS 0x0 register during
of the LA programming in tegra_mc_setup_latency_allowance() due to the
missing entry. Note that this patch doesn't fix any known problems.
Signed-off-by: Dmitry Osipenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/lists.py')
0 files changed, 0 insertions, 0 deletions