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authorManivannan Sadhasivam <[email protected]>2024-03-21 16:46:21 +0530
committerBjorn Andersson <[email protected]>2024-04-21 12:31:41 -0500
commit83d2a0a1e2b9fe1032630e0e560dee6ddd89d942 (patch)
tree091b3339f411e9f8300d6813acec9b1d95a0e900 /scripts/gdb/linux/lists.py
parentd73ed58d7f2793df161d0afb66afab3d1b862945 (diff)
arm64: dts: qcom: sm8250: Add PCIe bridge node
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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