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authorClaudiu Beznea <[email protected]>2023-12-07 09:06:54 +0200
committerGeert Uytterhoeven <[email protected]>2023-12-15 11:34:34 +0100
commit51996952b8b50942ed3069141ebc1dee13756b95 (patch)
tree4347e0fe8c33dc132b33f9ec5e067af8a620ce67 /scripts/gdb/linux/lists.py
parentd3aaa7203a17e8399df41e7c3f088f51368b001c (diff)
pinctrl: renesas: rzg2l: Add support to select power source for Ethernet pins
The GPIO controller available on RZ/G3S (but also on RZ/G2L) supports setting the power source for Ethernet pins. Based on the interface b/w the Ethernet controller and the Ethernet PHY, and on board design, a specific power source needs to be selected. The GPIO controller supports 1.8V, 2.5V, and 3.3V power source selection for the Ethernet pins. This can be selected though the ETHx_POC registers (x={0, 1}). Adjust the driver to support this, and to do proper instantiation for the RZ/G3S and RZ/G2L SoCs. On RZ/G2L only the get operation has been tested at the moment. While at it, as the power registers on RZ/G2L support access sizes of 8 bits, and these registers on RZ/G3S support access sizes of 8/16/32 bits, replace writel()/readl() on these registers with writeb()/readb(). This should allow us to use the same code on both SoCs w/o any issues. Signed-off-by: Claudiu Beznea <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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