diff options
| author | Dapeng Mi <dapeng1.mi@linux.intel.com> | 2023-05-04 15:21:28 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2023-05-08 10:58:32 +0200 |
| commit | 10d95a317ec12ec7dd4587a646c6bd6aa03c7ded (patch) | |
| tree | d367fcd8b079ac14723dd09d0b6fce3cb4abfe0f /scripts/gdb/linux/interrupts.py | |
| parent | 78075d947534013b4575687d19ebcbbb6d3addcd (diff) | |
perf/x86/intel: Define bit macros for FixCntrCtl MSR
Define bit macros for FixCntrCtl MSR and replace the bit hardcoding
with these bit macros. This would make code be more human-readable.
Perf commands 'perf stat -e "instructions,cycles,ref-cycles"' and
'perf record -e "instructions,cycles,ref-cycles"' pass.
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20230504072128.3653470-1-dapeng1.mi@linux.intel.com
Diffstat (limited to 'scripts/gdb/linux/interrupts.py')
0 files changed, 0 insertions, 0 deletions