ARM: OMAP4: PM: update ROM return address for OSWR and OFF

We need to add a dummy smc call to the cpuidle wakeup path to force the
ROM code to save the return address after MMU is enabled again. This is
needed to prevent random hangs on secure devices like droid4.

Otherwise the system will eventually hang when entering deeper SoC idle
states with the core and mpu domains in open-switch retention (OSWR).
The hang happens as the ROM code tries to use the earlier physical return
address set by omap-headsmp.S with MMU off while waking up CPU1 again.

The hangs started happening in theory already with commit caf8c87d7ff2
("ARM: OMAP2+: Allow core oswr for omap4"), but in practise the issue went
unnoticed as various drivers were often blocking any deeper idle states
with hardware autoidle features.

This patch is based on an earlier TI Linux kernel tree commit 92f0b3028d9e
("OMAP4: PM: update ROM return address for OSWR and OFF") written by
Carlos Leija <[email protected]>, Praneeth Bajjuri <[email protected]>, and
Bryan Buckley <[email protected]>. A later version of the patch was
updated to use CPU_PM notifiers by Tero Kristo <[email protected]>.

Signed-off-by: Carlos Leija <[email protected]>
Signed-off-by: Praneeth Bajjuri <[email protected]>
Signed-off-by: Bryan Buckley <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Fixes: caf8c87d7ff2 ("ARM: OMAP2+: Allow core oswr for omap4")
Reported-by: Carl Philipp Klemm <[email protected]>
Reported-by: Merlijn Wajer <[email protected]>
Cc: Ivan Jelincic <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Sebastian Reichel <[email protected]>
Cc: Tero Kristo <[email protected]>
[[email protected]: updated to apply, updated description]
Signed-off-by: Tony Lindgren <[email protected]>

0 files changed, 0 insertions, 0 deletions