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authorThor Thayer <[email protected]>2015-06-04 09:28:45 -0500
committerBorislav Petkov <[email protected]>2015-06-24 18:16:07 +0200
commitf9ae487e04370e229a96c83a8c86510299712192 (patch)
tree1f391d0be4bd1bd87ab4ec4a7dcfebaf9f2e9399 /scripts/gdb/linux/dmesg.py
parent99e21fea47f425f65f727c96ed8b64a7ac18e5cb (diff)
EDAC, altera: Generalize driver to use DT Memory size
The Arria10 SOC uses a completely different SDRAM controller from the earlier CycloneV and ArriaV SoCs. The memory size is calculated in the bootloader and passed via the device tree. Using this device tree size is more generic than using the register fields to calculate the memory size for different SDRAM controllers. Signed-off-by: Thor Thayer <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: linux-edac <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Borislav Petkov <[email protected]>
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