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| author | Georgi Djakov <djakov@kernel.org> | 2024-06-24 15:08:28 +0300 |
|---|---|---|
| committer | Georgi Djakov <djakov@kernel.org> | 2024-06-24 15:08:28 +0300 |
| commit | de0818e945e63203e71ad6441ade96a991c0a9b9 (patch) | |
| tree | 899f68659789fd27a0b827a7dfeb85ae165003e1 /scripts/gdb/linux/device.py | |
| parent | b14aa62c83ce6f65b2661c3138c586c93f1c9a77 (diff) | |
| parent | 9265ea04a7b501e45134de13c0cbb81e897adf33 (diff) | |
Merge branch 'icc-mtk' into icc-next
MediaTek DVFSRC Bus Bandwidth and Regulator knobs
This series adds support for the MediaTek Dynamic Voltage and Frequency
Scaling Resource Controller (DVFSRC), found on many MediaTek SoCs.
This hardware collects requests from both software and the various remote
processors embededd into the SoC, and decides about a minimum operating
voltage and a minimum DRAM frequency to fulfill those requests, in an
effort to provide the best achievable performance per watt.
Such hardware IP is capable of transparently performing direct register
R/W on all of the DVFSRC-controlled regulators and SoC bandwidth knobs.
Summarizing how the DVFSRC works for Interconnect:
ICC provider ICC Nodes
---- ----
_________ |CPU | |--- |VPU |
_____ | |----- ---- | ----
| |->| DRAM | ---- | ----
|DRAM |->|scheduler|----- |GPU | |--- |DISP|
| |->| (EMI) | ---- | ----
|_____|->|_________|---. ----- | ----
/|\ `-|MMSYS|--|--- |VDEC|
| ----- | ----
| | ----
| change DRAM freq |--- |VENC|
-------- | ----
SMC --> | DVFSRC | | ----
-------- |--- |IMG |
| ----
| ----
|--- |CAM |
----
* icc-mtk
dt-bindings: interconnect: Add MediaTek EMI Interconnect bindings
interconnect: mediatek: Add MediaTek MT8183/8195 EMI Interconnect driver
interconnect: mediatek: remove unneeded semicolon
Link: https://lore.kernel.org/r/20240610085735.147134-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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