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authorEric Anholt <[email protected]>2017-05-11 16:56:22 -0700
committerEric Anholt <[email protected]>2017-05-16 09:49:24 -0700
commit86c1b9eff3f27c82bceabd3b5c76376b26d26e92 (patch)
tree3f9a3c033d0bfc0da0035ec6a2ccd4fb340dd36e /scripts/gdb/linux/cpus.py
parentfdb888de9ef922c01c1a4a846a2498f572b8dcf4 (diff)
drm/vc4: Adjust modes in DSI to work around the integer PLL divider.
BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel clocks, so to support panels on the Raspberry Pi we need to set a higher pixel clock rate than requested and adjust the mode we program to extend out the HFP so that the refresh rate matches. v2: Drop an unfinished comment (caught by Noralf) Signed-off-by: Eric Anholt <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Daniel Vetter <[email protected]>
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