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| author | Geert Uytterhoeven <[email protected]> | 2022-04-22 09:29:30 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2022-05-03 09:57:35 +0200 |
| commit | 4288caed9a6319b766dc0adf605c7b401180db34 (patch) | |
| tree | b7fad47cbb678275502d46cfa7107bbe9022580a /scripts/gdb/linux/cpus.py | |
| parent | f7bc5f52d2354b41d5a111942be7ee01e5560c78 (diff) | |
pinctrl: renesas: r8a779a0: Fix GPIO function on I2C-capable pins
Unlike on R-Car Gen3 SoCs, setting a bit to zero in a GPIO / Peripheral
Function Select Register (GPSRn) on R-Car V3U is not always sufficient
to configure a pin for GPIO. For I2C-capable pins, the I2C function
must also be explicitly disabled in the corresponding Module Select
Register (MODSELn).
Add the missing FN_SEL_I2Ci_0 function enums to the pinmux_data[] array
by temporarily overriding the GP_2_j_FN function enum to expand to two
enums: the original GP_2_j_FN enum to configure the GSPR register bits,
and the missing FN_SEL_I2Ci_0 enum to configure the MODSEL register
bits.
Fixes: 741a7370fc3b8b54 ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/4611e29e7b105513883084c1d6dc39c3ac8b525c.1650610471.git.geert+renesas@glider.be
Diffstat (limited to 'scripts/gdb/linux/cpus.py')
0 files changed, 0 insertions, 0 deletions