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authorBen Widawsky <[email protected]>2015-03-16 16:00:55 +0000
committerDaniel Vetter <[email protected]>2015-03-20 11:48:17 +0100
commit317b4e903636305cfe702ab3e5b3d68547a69e72 (patch)
tree5e910d15ff93ffc2f8548c1dbe22be3dc9e02032 /scripts/gdb/linux/cpus.py
parent07749ef32c4fd60334c2451739460dd1cf600281 (diff)
drm/i915: Extract context switch skip and add pd load logic
In Gen8, PDPs are saved and restored with legacy contexts (legacy contexts only exist on the render ring). So change the ordering of LRI vs MI_SET_CONTEXT for the initialization of the context. Also the only cases in which we need to manually update the PDPs are when MI_RESTORE_INHIBIT has been set in MI_SET_CONTEXT (i.e. when the context is not yet initialized or it is the default context). Legacy submission is not available post GEN8, so it isn't necessary to add extra checks for newer generations. v2: Use new functions to replace the logic right away (Daniel) v3: Add missing pd load logic. v4: Add warning in case pd_load_pre & pd_load_post are true, and add missing trace_switch_mm. Cleaned up pd_load conditions. Add more information about when is pd_load_post needed. (Mika) Signed-off-by: Ben Widawsky <[email protected]> Signed-off-by: Michel Thierry <[email protected]> (v2+) Reviewed-by: Mika Kuoppala <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/cpus.py')
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