mtd: spi-nor: Fix address width on flash chips > 16MB

If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.

Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
Signed-off-by: Bert Vermeulen <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Reviewed-by: Pratyush Yadav <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Tested-by: Joel Stanley <[email protected]>
Tested-by: Cédric Le Goater <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

0 files changed, 0 insertions, 0 deletions