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| author | Dmitry Osipenko <[email protected]> | 2020-03-19 22:02:28 +0300 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2020-05-06 19:02:20 +0200 |
| commit | ae05ddc9b38076c2e4d4ce7363070a7b611eaa39 (patch) | |
| tree | 653af892d2ea7d4d735f7c4a0bfe087e543211a5 /scripts/gdb/linux/clk.py | |
| parent | 7860c8738a164035a24fa471a27d25214e1211b0 (diff) | |
ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
Set min/max voltage and couple CPU/CORE regulators.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/clk.py')
0 files changed, 0 insertions, 0 deletions