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| author | Tomi Valkeinen <[email protected]> | 2020-04-22 12:15:12 +0300 |
|---|---|---|
| committer | Tero Kristo <[email protected]> | 2020-04-27 13:01:12 +0300 |
| commit | 0836dacecf48a4fef6e625d4f64f9dea3a2aab8d (patch) | |
| tree | 1412e2967d8a96d508cf912f6abbbb7e1020f157 /scripts/gdb/linux/clk.py | |
| parent | 76921f15acc0758e7e6a0f84bf9c082b8240184b (diff) | |
arm64: dts: ti: k3-j721e-common-proc-board: add assigned clks for DSS
The DSS related clock muxes are set via assigned-clocks in a way which
provides us:
VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1
Signed-off-by: Tomi Valkeinen <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/clk.py')
0 files changed, 0 insertions, 0 deletions