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authorWyes Karny <wyes.karny@amd.com>2022-11-17 15:35:37 +0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2022-11-22 19:57:14 +0100
commit919f4557696939625085435ebde09a539de2349c (patch)
tree02bf191d46ee888ab41ffa7ed2b33c35090f2cae /scripts/gcc-plugins/gcc-generate-gimple-pass.h
parentcdcc5ef26b39c3d02d4e69c0352b007ebe438a22 (diff)
cpufreq: amd-pstate: cpufreq: amd-pstate: reset MSR_AMD_PERF_CTL register at init
MSR_AMD_PERF_CTL is guaranteed to be 0 on a cold boot. However, on a kexec boot, for instance, it may have a non-zero value (if the cpu was in a non-P0 Pstate). In such cases, the cores with non-P0 Pstates at boot will never be pushed to P0, let alone boost frequencies. Kexec is a common workflow for reboot on Linux and this creates a regression in performance. Fix it by explicitly setting the MSR_AMD_PERF_CTL to 0 during amd_pstate driver init. Cc: All applicable <stable@vger.kernel.org> Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'scripts/gcc-plugins/gcc-generate-gimple-pass.h')
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