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author | Dmitry Osipenko <[email protected]> | 2020-09-30 01:18:48 +0300 |
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committer | Wolfram Sang <[email protected]> | 2020-10-05 22:57:40 +0200 |
commit | 8548a75f3e8d8d39c1f4ceca04c4febfa8eaa127 (patch) | |
tree | c4706d0639bec759733e066f60cae1b784c80be5 /scripts/gcc-plugins/cyc_complexity_plugin.c | |
parent | ed022e5dd3a044b95a68d685d2d2871ce31351df (diff) |
i2c: tegra: Initialize div-clk rate unconditionally
It doesn't make sense to conditionalize the div-clk rate changes because
rate is fixed and it won't ever change once it's set at the driver's probe
time. All further changes are NO-OPs because CCF caches rate and skips
rate-change if rate is unchanged.
Reviewed-by: Michał Mirosław <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Wolfram Sang <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/cyc_complexity_plugin.c')
0 files changed, 0 insertions, 0 deletions