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author | Wanpeng Li <wanpengli@tencent.com> | 2021-10-19 01:12:39 -0700 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-10-22 05:19:28 -0400 |
commit | 540c7abe61cc5e81a3d17fe02bce94f6cbf9dce0 (patch) | |
tree | edba722c928641ac493ee745d949bf7485c7668b /scripts/gcc-plugins/cyc_complexity_plugin.c | |
parent | 610265ea3da117db435868bd109f1861534a5634 (diff) |
KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0
SDM section 18.2.3 mentioned that:
"IA32_PERF_GLOBAL_OVF_CTL MSR allows software to clear overflow indicator(s) of
any general-purpose or fixed-function counters via a single WRMSR."
It is R/W mentioned by SDM, we read this msr on bare-metal during perf testing,
the value is always 0 for ICX/SKX boxes on hands. Let's fill get_msr
MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 as hardware behavior and drop
global_ovf_ctrl variable.
Tested-by: Like Xu <likexu@tencent.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Message-Id: <1634631160-67276-2-git-send-email-wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts/gcc-plugins/cyc_complexity_plugin.c')
0 files changed, 0 insertions, 0 deletions