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authorJan Kundrát <[email protected]>2018-06-08 14:27:00 +0200
committerGreg Kroah-Hartman <[email protected]>2018-06-28 21:07:54 +0900
commit4cf9a888fd3c8e61509afb0d2fe0ad2170d77d9f (patch)
treea8dbcb39cba5d012b7c49de1cdbbfc306bd59eee /scripts/gcc-plugins/cyc_complexity_plugin.c
parentc884f871fb0ef0af0485d270215ba7f7debf38ad (diff)
serial: max310x: Check the clock readiness
This chip has a diagnostics status bit informing about the state and stability of the clock subsystem. According to the datasheet (STSint register, bit 5, ClockReady), this bit works with the crystal oscillator, but even without the PLL. Therefore: - ensure that the clock check is done even when PLL is not active - warn when the chip thinks that the clock is not ready yet There are HW features which would let us wait asynchronously (there's a maskable IRQ for that bit), but I think that even this simple check is a net improvement. It would have saved me two days of debugging :). Signed-off-by: Jan Kundrát <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/cyc_complexity_plugin.c')
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