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author | Srinivas Pandruvada <[email protected]> | 2019-11-19 16:22:54 -0800 |
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committer | Andy Shevchenko <[email protected]> | 2019-11-21 14:31:34 +0200 |
commit | 1434a3d357d656d4b11fcbdc9b6c35dc673292a0 (patch) | |
tree | f049f8e4933a3a877eedbcfc6d96737b6075ab4f /scripts/gcc-plugins/cyc_complexity_plugin.c | |
parent | 20183ccd3e4d01d23b0a01fe9f3ee73fbae312fa (diff) |
tools/power/x86/intel-speed-select: Display TRL buckets for just base config level
When only base config level is present, this tool is displaying TRL
(Turbo-ratio-limits) by reading legacy MSR. In this case, also present
core count for TRL by reading MSR 0x1AE.
Signed-off-by: Srinivas Pandruvada <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/cyc_complexity_plugin.c')
0 files changed, 0 insertions, 0 deletions