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| author | Andrew Jeffery <[email protected]> | 2019-09-02 13:28:42 +0930 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2019-09-11 15:58:39 +0200 |
| commit | 0a0e8d7501cda79c9b20f6011814e2ec9b473ade (patch) | |
| tree | a354f1351ed85a1979fba13605e49c9580dd26aa /scripts/gcc-plugins/cyc_complexity_plugin.c | |
| parent | 7b954cdf33da3d3bd8046c499426b7433724f82e (diff) | |
mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the
maximum clock rate if it is set. This enables artificial limitation of
the bus speed via max-frequency in the devicetree for e.g. the AST2600
evaluation board where I was seeing errors at 200MHz.
Signed-off-by: Andrew Jeffery <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/cyc_complexity_plugin.c')
0 files changed, 0 insertions, 0 deletions