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authorPotnuri Bharat Teja <[email protected]>2022-08-10 00:11:18 +0530
committerLeon Romanovsky <[email protected]>2022-08-16 16:20:52 +0300
commitef0162298abf46b881e4a4d0c604d1a066228647 (patch)
tree142622c19f055f0c436e33d5e570328715daadd9 /scripts/clang-tools/gen_compile_commands.py
parent4b83c3caf289b80acecc539c79f10a6937cc42dd (diff)
RDMA/cxgb4: fix accept failure due to increased cpl_t5_pass_accept_rpl size
Commit 'c2ed5611afd7' has increased the cpl_t5_pass_accept_rpl{} structure size by 8B to avoid roundup. cpl_t5_pass_accept_rpl{} is a HW specific structure and increasing its size will lead to unwanted adapter errors. Current commit reverts the cpl_t5_pass_accept_rpl{} back to its original and allocates zeroed skb buffer there by avoiding the memset for iss field. Reorder code to minimize chip type checks. Fixes: c2ed5611afd7 ("iw_cxgb4: Use memset_startat() for cpl_t5_pass_accept_rpl") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Potnuri Bharat Teja <[email protected]> Signed-off-by: Rahul Lakkireddy <[email protected]> Reviewed-by: Kees Cook <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]>
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