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author | Jay Dolan <[email protected]> | 2021-11-22 14:06:04 +0200 |
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committer | Greg Kroah-Hartman <[email protected]> | 2021-11-25 18:42:15 +0100 |
commit | bb1201d4b38ec67bd9a871cf86b0cc10f28b15b5 (patch) | |
tree | 01fac5c954d90f48a39b7ddb551b9f84d2fec1cf /scripts/clang-tools/gen_compile_commands.py | |
parent | c525c5d2437f93520388920baac6d9340c65d239 (diff) |
serial: 8250_pci: rewrite pericom_do_set_divisor()
Have pericom_do_set_divisor() use the uartclk instead of a hard coded
value to work with different speed crystals. Tested with 14.7456 and 24
MHz crystals.
Have pericom_do_set_divisor() always calculate the divisor rather than
call serial8250_do_set_divisor() for rates below baud_base.
Do not write registers or call serial8250_do_set_divisor() if valid
divisors could not be found.
Fixes: 6bf4e42f1d19 ("serial: 8250: Add support for higher baud rates to Pericom chips")
Cc: stable <[email protected]>
Signed-off-by: Jay Dolan <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'scripts/clang-tools/gen_compile_commands.py')
0 files changed, 0 insertions, 0 deletions