diff options
| author | Oleksij Rempel <[email protected]> | 2020-04-01 11:57:32 +0200 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2020-04-01 11:20:47 -0700 |
| commit | b1f4c209d84057b6d40b939b6e4404854271d797 (patch) | |
| tree | fe026f04d39222a1fd46da2185b952e8340523b2 /scripts/bpf_helpers_doc.py | |
| parent | cef8dac96bc108633f5090bb3a9988d734dc1ee0 (diff) | |
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
for the values that comprise the fields, not zero-bits-set.
This patch fixes the clock frequency configuration for ATH8030 and
ATH8035 Atheros PHYs by removing the erroneous "~".
To reproduce this bug, configure the PHY with the device tree binding
"qca,clk-out-frequency" and remove the machine specific PHY fixups.
Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
Signed-off-by: Oleksij Rempel <[email protected]>
Reported-by: Russell King <[email protected]>
Reviewed-by: Russell King <[email protected]>
Tested-by: Russell King <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'scripts/bpf_helpers_doc.py')
0 files changed, 0 insertions, 0 deletions