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author | Marek Szyprowski <[email protected]> | 2019-08-28 14:10:04 +0200 |
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committer | Krzysztof Kozlowski <[email protected]> | 2019-10-02 17:39:57 +0200 |
commit | 9c8238b85c26f7cb349063ce3be9dd05c15c748c (patch) | |
tree | ddbfd618695f8bc56cb235115467a208dd3fc118 /scripts/bpf_helpers_doc.py | |
parent | 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff) |
ARM: dts: exynos: Add support ARM architected timers on Exynos5
All CortexA7/A15 based Exynos5 SoCs have ARM architected timers, so enable
support for them directly in the base dtsi. None of the known firmware
properly configures CNTFRQ arch timer register, so force clock frequency
to 24MHz, which is the only configuration supported by the remaining
clock drivers so far.
Stock firmware for Peach Pit and Pi Chromebooks also doesn't reset
properly other arch timer registers, so add respective properties
indicating that. Other Exynos5-based boards behaves correctly in this area,
what finally allows to enable support for KVM-based virtualization.
Signed-off-by: Marek Szyprowski <[email protected]>
Tested-by: Chanwoo Choi <[email protected]>
Reviewed-by: Chanwoo Choi <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'scripts/bpf_helpers_doc.py')
0 files changed, 0 insertions, 0 deletions