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authorImre Deak <[email protected]>2018-11-06 18:06:21 +0200
committerImre Deak <[email protected]>2018-11-08 19:27:29 +0200
commit602438ead302aaa844899db5214b489d0d93fe18 (patch)
treeef833b16f6e57f2841ba991c9c6df228c0521759 /scripts/bpf_helpers_doc.py
parentbc458c1174e3124c10897fcc1b8b54fbc2db474e (diff)
drm/i915/icl: Fix port B combo PHY context loss after DC transitions
On ICL DMC/PCODE retains the HW context only for port A across DC transitions, for the other port B combo PHY, it doesn't. So we need to do this manually after exiting from DC6. Do the reinit even after exiting from DC5, it won't hurt since we only reinit the PHY in case it's needed (in case it was disabled to begin with). As can be guessed from the bugzilla report leaving the PHY uninited will lead to a later timeout during the port B specific AUX and DDI_IO power well enabling. v2: - Apply the fix on all GEN>=11 platforms. (Rodrigo) Bspec: 21257 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108070 Cc: Paulo Zanoni <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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