diff options
author | Andi Kleen <[email protected]> | 2021-11-18 19:58:03 -0800 |
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committer | Thomas Gleixner <[email protected]> | 2021-11-25 00:40:34 +0100 |
commit | 9c7e2634f647630db4e0719391dd80cd81132a66 (patch) | |
tree | 638f7286c835a790601d829818d3a15b8e5e45c0 /scripts/bpf_doc.py | |
parent | 136057256686de39cc3a07c2e39ef6bc43003ff6 (diff) |
x86/cpu: Don't write CSTAR MSR on Intel CPUs
Intel CPUs do not support SYSCALL in 32-bit mode, but the kernel
initializes MSR_CSTAR unconditionally. That MSR write is normally
ignored by the CPU, but in a TDX guest it raises a #VE trap.
Exclude Intel CPUs from the MSR_CSTAR initialization.
[ tglx: Fixed the subject line and removed the redundant comment. ]
Signed-off-by: Andi Kleen <[email protected]>
Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Tony Luck <[email protected]>
Link: https://lore.kernel.org/r/20211119035803.4012145-1-sathyanarayanan.kuppuswamy@linux.intel.com
Diffstat (limited to 'scripts/bpf_doc.py')
0 files changed, 0 insertions, 0 deletions