PCI: designware: Remove incorrect RC memory base/limit configuration

Currently dw_pcie_setup_rc() configures memory base and memory limit in the
type1 configuration header for the root complex.  In doing so it uses the
CPU address (pp->mem_base) rather than the bus address (pp->mem_bus_addr).
This is wrong and it is useless since the configuration is overwritten
later on when pci_bus_assign_resources() is called.

Remove this configuration from dw_pcie_setup_rc().

Signed-off-by: Gabriele Paoloni <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Pratyush Anand <[email protected]>

0 files changed, 0 insertions, 0 deletions