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authorVladimir Oltean <vladimir.oltean@nxp.com>2024-08-15 03:07:04 +0300
committerDavid S. Miller <davem@davemloft.net>2024-08-16 09:59:32 +0100
commitc5e12ac3beb0dd3a718296b2d8af5528e9ab728e (patch)
tree9f04a693eff3f265ddfeaababa0234ca8b221c97 /rust
parente1b9e80236c540fa85d76e2d510d1b38e1968c5d (diff)
net: mscc: ocelot: serialize access to the injection/extraction groups
As explained by Horatiu Vultur in commit 603ead96582d ("net: sparx5: Add spinlock for frame transmission from CPU") which is for a similar hardware design, multiple CPUs can simultaneously perform injection or extraction. There are only 2 register groups for injection and 2 for extraction, and the driver only uses one of each. So we'd better serialize access using spin locks, otherwise frame corruption is possible. Note that unlike in sparx5, FDMA in ocelot does not have this issue because struct ocelot_fdma_tx_ring already contains an xmit_lock. I guess this is mostly a problem for NXP LS1028A, as that is dual core. I don't think VSC7514 is. So I'm blaming the commit where LS1028A (aka the felix DSA driver) started using register-based packet injection and extraction. Fixes: 0a6f17c6ae21 ("net: dsa: tag_ocelot_8021q: add support for PTP timestamping") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'rust')
0 files changed, 0 insertions, 0 deletions