diff options
| author | Luca Weiss <luca.weiss@fairphone.com> | 2024-05-08 10:12:53 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-05-28 16:30:23 -0500 |
| commit | 3414f41a13eb41db15c558fbc695466203dca4fa (patch) | |
| tree | fd56afa766230ff17a9acf9b0cf641dd0e0573bf /rust/kernel/alloc/vec_ext.rs | |
| parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) | |
clk: qcom: gcc-sm6350: Fix gpll6* & gpll7 parents
Both gpll6 and gpll7 are parented to CXO at 19.2 MHz and not to GPLL0
which runs at 600 MHz. Also gpll6_out_even should have the parent gpll6
and not gpll0.
Adjust the parents of these clocks to make Linux report the correct rate
and not absurd numbers like gpll7 at ~25 GHz or gpll6 at 24 GHz.
Corrected rates are the following:
gpll7 807999902 Hz
gpll6 768000000 Hz
gpll6_out_even 384000000 Hz
gpll0 600000000 Hz
gpll0_out_odd 200000000 Hz
gpll0_out_even 300000000 Hz
And because gpll6 is the parent of gcc_sdcc2_apps_clk_src (at 202 MHz)
that clock also reports the correct rate now and avoids this warning:
[ 5.984062] mmc0: Card appears overclocked; req 202000000 Hz, actual 6312499237 Hz
Fixes: 131abae905df ("clk: qcom: Add SM6350 GCC driver")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20240508-sm6350-gpll-fix-v1-1-e4ea34284a6d@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'rust/kernel/alloc/vec_ext.rs')
0 files changed, 0 insertions, 0 deletions