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| author | Csókás, Bence <[email protected]> | 2024-09-24 11:37:06 +0200 |
|---|---|---|
| committer | Paolo Abeni <[email protected]> | 2024-10-01 11:21:12 +0200 |
| commit | d9335d0232d2da605585eea1518ac6733518f938 (patch) | |
| tree | c56cd5bf2d916a9f9459f6c0dcb49d041c391911 /rust/helpers/build_bug.c | |
| parent | a1477dc87dc4996dcf65a4893d4e2c3a6b593002 (diff) | |
net: fec: Reload PTP registers after link-state change
On link-state change, the controller gets reset,
which clears all PTP registers, including PHC time,
calibrated clock correction values etc. For correct
IEEE 1588 operation we need to restore these after
the reset.
Fixes: 6605b730c061 ("FEC: Add time stamping code and a PTP hardware clock")
Signed-off-by: Csókás, Bence <[email protected]>
Reviewed-by: Wei Fang <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Paolo Abeni <[email protected]>
Diffstat (limited to 'rust/helpers/build_bug.c')
0 files changed, 0 insertions, 0 deletions