drm/i915: flush plane control changes on ILK+ as well

After writing to the plane control reg we need to write to the surface
reg to trigger the double buffered register latch.  On previous
chipsets, writing to DSPADDR was enough, but on ILK+ DSPSURF is the reg
that triggers the double buffer latch.

v2: write DSPADDR too to cover pre-965 chipsets
v3: use flush_display_plane instead, that's what it's for
v4: send the right patch

Signed-off-by: Jesse Barnes <[email protected]>
Tested-by: Keith Packard <[email protected]>
Reviewed-by: Keith Packard <[email protected]>
Signed-off-by: Keith Packard <[email protected]>

0 files changed, 0 insertions, 0 deletions