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| author | Thierry Reding <[email protected]> | 2015-04-20 15:05:33 +0200 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2016-04-28 12:41:48 +0200 |
| commit | 98c4b3661b5aee0e583d17d6304f6489c0f41155 (patch) | |
| tree | cdbb55a6cfb2d18bade67ba8ad2e876bfd743f71 /net/switchdev/switchdev.c | |
| parent | 3d0f4e5f7a7c9ef2d8504f2b42f9c4d3233ba707 (diff) | |
clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions