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author | Ivan Mikhaylov <[email protected]> | 2019-08-28 13:24:01 +0300 |
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committer | Wim Van Sebroeck <[email protected]> | 2019-09-17 08:59:13 +0200 |
commit | 3d9e89bda9e9f01d55ff72f58d619e77d0c5b248 (patch) | |
tree | bc133ab7d038785b930a0acc2647744911f91271 /net/switchdev/switchdev.c | |
parent | e07a4c79ca75bf41d73ba74c06f7220cd2741bc9 (diff) |
watchdog: aspeed: add support for dual boot
Set WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION into WDT_CLEAR_TIMEOUT_STATUS
to clear out boot code source and re-enable access to the primary SPI flash
chip while booted via wdt2 from the alternate chip.
AST2400 datasheet says:
"In the 2nd flash booting mode, all the address mapping to CS0# would be
re-directed to CS1#. And CS0# is not accessible under this mode. To access
CS0#, firmware should clear the 2nd boot mode register in the WDT2 status
register WDT30.bit[1]."
Signed-off-by: Ivan Mikhaylov <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Wim Van Sebroeck <[email protected]>
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions