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authorPaul Burton <[email protected]>2015-09-22 11:29:11 -0700
committerRalf Baechle <[email protected]>2015-09-27 14:11:18 +0200
commitd77d5ac9c9b5abf45aeb6e12930fab832e5c81d1 (patch)
tree5100ac3b99c31ed538cf7fcd149a42d67e1f204c /net/lapb
parentab41f6c8620a6e65df4ee19d284c97efdd3d9b63 (diff)
irqchip: mips-gic: Fix pending & mask reads for MIPS64 with 32b GIC.
gic_handle_shared_int reads the GIC interrupt pending & mask registers directly into a bitmap, which is defined as an array of unsigned longs. The GIC pending registers may be 32 bits wide if the CM is older than CM3, regardless of the bit width of the CPU, but for MIPS64 kernels the unsigned longs in the bitmap will be 64 bits wide. In this case we need to perform 2 x 32 bit reads per 64 bit unsigned long in order to avoid missing interrupts. Signed-off-by: Paul Burton <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: Marc Zyngier <[email protected]> Cc: Jason Cooper <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/11213/ Signed-off-by: Ralf Baechle <[email protected]>
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